CHIPWARE LABS

UniKocaeli Chipware Microelectronics Laboratory

Created with Sketch.

TEKNOFEST CHIP DESIGN COMPETITON

Chip Design Competition is organized within the scope of TEKNOFEST Technology Competitions.
The aim of the Chip Design Competition is to increase students’ interest in microelectronic technologies and to develop their potential in this field.

Microchips, which are at the heart of digital transformation, have become one of the most important elements of technological independence today. TEKNOFEST 2025 offers a unique platform for young talents to strengthen Turkey’s domestic chip ecosystem.

The competition organizes in three categories:

  • Analog Design Category,
  • Digital Processor Design Category
  • Microcontroller Design Category

About the Competition: Designing a Microcontroller

In the competition sponsored by Yongatek Mikroelektronik, participants are expected to design and verify a comprehensive microcontroller with various interface elements and memory units using a ready-made processor core.

This competition is not just a theoretical exercise! Your design will both work as a prototype on an FPGA and be ready to be manufactured as a real chip. This is an opportunity for young engineers in Turkey to experience a completed chip design cycle.

Two Phase Design Process

Competitors will develop their designs in two stages:

  1. FPGA Prototyping

The first step is to implement your design on the FPGA development board. At this stage, you will be able to test the behavior of your microcontroller on real hardware, evaluate its performance and make necessary improvements.

  1. Physical Design (IC Design)

The second and more challenging stage is to get your prototype ready to be manufactured as an actual chip. Using integrated circuit design software, you will need to prepare production files in GDSII format.

Technical Requirements and Specifications

The technical framework of the competition is quite clear:
Processor: CV32E40P RISC-V core IP to be used (32-bit, 4-stage pipeline architecture)
Programming Language: Verilog, SystemVerilog or VHDL hardware description languages can be used
Documentation:Throughout the design process, the work of the teams will be stored in a private repository on GitHub and updated every 20 days

These design requirements are aligned with industry standards and in line with methodologies used in real-world chip design projects.

Much of the scoring focuses on technical design competence. This shows that the competition aims to seriously evaluate engineering skills.

Success Criteria: Real World Standards

To be eligible for the award, teams must meet the following minimum criteria:

  • The designed microcontroller must successfully pass the test scenarios specified on the FPGA development board
  • LDPC (low density parity control) accelerator AXI interfaces should be verified with UVM/SystemVerilog methodologies
  • Successfully complete the physical design flow and prepare the necessary GDSII deliverables for production